; Asm codes generated by Shanghai Haier C Compiler
; HRCO, Ver: 1.0,0137

#INCLUDE       	<ES7P169C.INC>
#INCLUDE       	<OPERATION.INC>
	PUBLIC         	_#T0
	EXTERN         	MUL_TEMP
	EXTERN         	MUL_TEMP
	PUBLIC         	_rxbuf
	PUBLIC         	_str
	PUBLIC         	_RAMclear
	PUBLIC         	_GPIOInit
	PUBLIC         	_main
	PUBLIC         	_isr
_#S9641C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c	CSEG           
	ADD            	PCRL,	1
_#S9641
	RETIA          	0X77
	RETIA          	0X77
	RETIA          	0X77
	RETIA          	0X2E
	RETIA          	0X65
	RETIA          	0X73
	RETIA          	0X73
	RETIA          	0X65
	RETIA          	0X6D
	RETIA          	0X69
	RETIA          	0X2E
	RETIA          	0X63
	RETIA          	0X6F
	RETIA          	0X6D
	RETIA          	0X0
_main_ptr_7	EQU            	_mainDATA + 0X0		; Bank 0
_main_#T9856_8	EQU            	_mainDATA + 0X2		; Bank 0
_isr_#T9884_13	EQU            	_isrDATA + 0X0		; Bank 0
_isr_#T9891_13	EQU            	_isrDATA + 0X0		; Bank 0
#TMP	EQU            	?_TMP+ 0X0		; Bank 0
?_TMP_RET	EQU            	?_TMP		; Bank 0
_RX1LEN_0#sh	EQU            	0X6AE		; Bank 0
_RX1EN_0#sh	EQU            	0X6AF		; Bank 0
_TRMT1_0#sh	EQU            	0X6B9		; Bank 0
_BRGH1_0#sh	EQU            	0X6BD		; Bank 0
_TX1LEN_0#sh	EQU            	0X6BE		; Bank 0
_TX1EN_0#sh	EQU            	0X6BF		; Bank 0
_RX1B_0#sh	EQU            	0XD4		; Bank 0
_TX1B_0#sh	EQU            	0XD6		; Bank 0
_BR1R_0#sh	EQU            	0XD8		; Bank 0
_MULA_0#sh	EQU            	(MULA - 0X6080) % 0X40 + 0xC0		; Bank 0
_MULB_0#sh	EQU            	(MULB - 0X6080) % 0X40 + 0xC0		; Bank 0
_MULL_0#sh	EQU            	(MULL - 0X6080) % 0X40 + 0xC0		; Bank 0
_MULH_0#sh	EQU            	(MULH - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVEL_0#sh	EQU            	(DIVEL - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVEM_0#sh	EQU            	(DIVEM - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVSL_0#sh	EQU            	(DIVSL - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVSH_0#sh	EQU            	(DIVSH - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVQL_0#sh	EQU            	(DIVQL - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVQM_0#sh	EQU            	(DIVQM - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVRL_0#sh	EQU            	(DIVRL - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVRH_0#sh	EQU            	(DIVRH - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVC_0#sh	EQU            	(DIVC - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVEU_0#sh	EQU            	(DIVEU - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVEH_0#sh	EQU            	(DIVEH - 0X6080) % 0X40 + 0xC0		; Bank 0
_FRAH_0#sh	EQU            	(FRAH - 0X6080) % 0X40 + 0xC0		; Bank 0
_FRAL_0#sh	EQU            	(FRAL - 0X6080) % 0X40 + 0xC0		; Bank 0
	_DESC          	GPIOInit,0X0,0X0
GPIOInit#	CSEG           
_GPIOInit
; /*********************************************************
; *Copyright (C), 2020, Shanghai Eastsoft Microelectronics Co., Ltd
; *文件名:  uart.c
; *作  者:  AE Team
; *版  本:  v1.0，编译于iDesigner(v4.2.3.166) + 工具链HRCC(v1.2.0.106)
; *日  期:  2020/07/07
; *描  述:  UART通信演示
;           PB5：TX
;           PB6：RX
;           与上位机通信，波特率9600，复位发送一次"www.essemi.com"，然后循环将接收的数据原样返回。
;           可通过宏定义的方式选择采用查询法发送接收或选择中断方式发送接收。
; *备  注:  本软件仅供学习和演示使用，对用户直接引用代码所带来的风险或后果不承担任何法律责任。
; **********************************************************/
; #include <hic.h>
; #define IT_SR       //中断发送接收，注释此宏定义则使用查询方式发送接收
; #define CLRWDT()   {__Asm CWDT;}        //宏定义清狗指令
; unsigned char rxbuf;
; unsigned char str[] = "www.essemi.com\0";
; /******************************************************
; 函数名：void RAMclear(void)
; 描  述：RAM区数据清零，RAM区地址0x0000~0x03FF
; 输入值：无
; 输出值：无
; 返回值：无
; *******************************************************/
; void RAMclear(void)
; {
;     for (IAAH = 0; IAAH <= 0x03; IAAH++)
;     {
;         for (IAAL = 0; IAAL < 0xFF; IAAL++)
;             IAD = 0x00;
;         IAD = 0x00;
;     }
; }
; /******************************************************
; 函数名：void GPIOInit(void)
; 描  述：首先初始化所有未用到的IO口为输出低电平
; 输入值：无
; 输出值：无
; 返回值：无
; *******************************************************/
; void GPIOInit(void)
; {
#line 49	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     ANSL = 0xFF;        //选择对应端口为数字IO功能
	CLR            	BKSR
;   49:(    ASGN_1,        255 ,            ,      ANSL)

; ITemplate_ASGN1_4_R
	MOVI           	0xff
	MOVA           	_ANSL_0
#line 50	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     ANSH = 0xFF;        //选择对应端口为数字IO功能
;   50:(    ASGN_1,        255 ,            ,      ANSH)

; ITemplate_ASGN1_4_R
	MOVI           	0xff
	MOVA           	_ANSH_0
#line 51	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     PAT = 0x00;         //所有IO设为输出低电平
;   51:(    ASGN_1,          0 ,            ,       PAT)

; ITemplate_CLR1_4_TMP
	CLR            	_PAT_0
#line 52	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     PBT = 0x00;
;   52:(    ASGN_1,          0 ,            ,       PBT)

; ITemplate_CLR1_4_TMP
	CLR            	_PBT_0
#line 53	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     PCT = 0x00;
;   53:(    ASGN_1,          0 ,            ,       PCT)

; ITemplate_CLR1_4_TMP
	CLR            	_PCT_0
#line 54	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     PA = 0x00;
;   54:(    ASGN_1,          0 ,            ,        PA)

; ITemplate_CLR1_4_TMP
	CLR            	_PA_0
#line 55	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     PB = 0x00;
;   55:(    ASGN_1,          0 ,            ,        PB)

; ITemplate_CLR1_4_TMP
	CLR            	_PB_0
#line 56	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     PC = 0x00;
;   56:(    ASGN_1,          0 ,            ,        PC)

; ITemplate_CLR1_4_TMP
	CLR            	_PC_0
#line 57	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ; }
;   57:(       RET,            ,            ,          )

; ITemplate_RET
	RET            			; Bank 0		; ShBank 0
	_DESC          	main,0X1,0X0,GPIOInit

SECTION1main	UNINTIAL       	0		; Bank 0
	ORG            	0X8F		; Bank 0
_mainDATA	RSEG           	0X4		; Bank 0
main#	CSEG           
_main
; /**********************************************
; 函数名：void main(void)
; 描  述：主函数
; 输入值：无
; 输出值：无
; 返回值：无
; **********************************************/
; void main(void)
; {
#line 68	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     unsigned char *ptr = str;
	CLR            	BKSR
;   68:(    ASGN_2,    (str.0) ,            ,       ptr)

; ITemplate_ASGN1_4_R
	MOVI           	HIGH(_str)
	SECTION        	0x1
	MOVA           	(_main_ptr_7+0x1) & 0X7F		; Bank 1
	MOVI           	_str
	MOVA           	(_main_ptr_7) & 0X7F		; Bank 1
; //    RAMclear();
#line 70	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     GPIOInit();
;   70:(      CALL, (GPIOInit.0) ,            ,          )

; ITemplate_CALL
	SEGMENTSEL     	_GPIOInit
	CALL           	_GPIOInit		; Bank 0		; ShBank 0
	SEGMENTSEL     	$
#line 71	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     PBT5 = 0;       //TX输出
;   71:(    ASGN_0,          0 ,            ,      PBT5)

; ITemplate_CLR_0_TMP
	BCC            	(_PBT5_0)/8,	(_PBT5_0)%8
#line 72	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     PBT6 = 1;       //RX输入
;   72:(    ASGN_0,          1 ,            ,      PBT6)

; ITemplate_SET_0_TMP
	BSS            	(_PBT6_0)/8,	(_PBT6_0)%8
#line 73	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     RX1LEN = 0;     //8位数据接收格式
;   73:(    ASGN_0,          0 ,            ,    RX1LEN)

; ITemplate_CLR_0_TMP
	BSS            	BKSR,	0x4
	BCC            	(_RX1LEN_0#sh)/8,	(_RX1LEN_0#sh)%8		; ShBank 1
#line 74	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     TX1LEN = 0;     //8位数据发送格式
;   74:(    ASGN_0,          0 ,            ,    TX1LEN)

; ITemplate_CLR_0_TMP
	BCC            	(_TX1LEN_0#sh)/8,	(_TX1LEN_0#sh)%8		; ShBank 1
#line 75	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     BRGH1 = 0;      //波特率低速模式：波特率=Fosc/(64*(BRR<7:0>+1))
;   75:(    ASGN_0,          0 ,            ,     BRGH1)

; ITemplate_CLR_0_TMP
	BCC            	(_BRGH1_0#sh)/8,	(_BRGH1_0#sh)%8		; ShBank 1
#line 76	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     BR1R = 0x19;    //波特率=16MHz/(64*(25+1))≈9600bps
;   76:(    ASGN_1,         25 ,            ,      BR1R)

; ITemplate_ASGN1_4_R
	MOVI           	0x19
	MOVA           	_BR1R_0#sh		; ShBank 1
; #ifdef IT_SR
#line 79	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     RX1IE = 1;       //接收中断
;   79:(    ASGN_0,          1 ,            ,     RX1IE)

; ITemplate_SET_0_TMP
	BSS            	(_RX1IE_0)/8,	(_RX1IE_0)%8
#line 80	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     GIE = 1;        //打开总中断
;   80:(    ASGN_0,          1 ,            ,       GIE)

; ITemplate_SET_0_TMP
	BSS            	(_GIE_0)/8,	(_GIE_0)%8
; #endif
#line 82	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     RX1EN = 1;       //打开接收
;   82:(    ASGN_0,          1 ,            ,     RX1EN)

; ITemplate_SET_0_TMP
	BSS            	(_RX1EN_0#sh)/8,	(_RX1EN_0#sh)%8		; ShBank 1
#line 83	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     TX1EN = 1;       //打开发送
;   83:(    ASGN_0,          1 ,            ,     TX1EN)

; ITemplate_SET_0_TMP
	BSS            	(_TX1EN_0#sh)/8,	(_TX1EN_0#sh)%8		; ShBank 1
#line 85	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     while (*ptr)        //发送："www.essemi.com"
;   85:(     LABEL,     #L9837 ,            ,          )

; ITemplate_LABEL
#L9837
;   85:(      JZ_1,       *ptr ,            ,    #L9872)

; ITemplate_GetRamRef
	SECTION        	0x1
	MOV            	(_main_ptr_7+0x1) & 0X7F,	0x0		; Bank 1
	MOVA           	IAAH
	MOV            	(_main_ptr_7) & 0X7F,	0x0		; Bank 1
	MOVA           	IAAL
	MOV            	IAD,	0x0
	MOVAR          	?_TMP		; Bank 0
; ITemplate_JZ1_4
	SECTION        	0x0
	MOV            	(?_TMP) & 0X7F,	0x0		; Bank 0
	JBC            	PSW,	0x2
	GOTO           	#L9872
;     {
#line 87	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;         while (!TRMT1);
;   87:(     LABEL,     #L9842 ,            ,          )

; ITemplate_LABEL
#L9842
;   87:(      JZ_0,      TRMT1 ,            ,    #L9842)

; ITemplate_JZ_0
	JBS            	(_TRMT1_0#sh)/8,	(_TRMT1_0#sh)%8		; ShBank 1
	GOTO           	#L9842
#line 89	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;         TX1B = *(ptr++);
;   89:(    ASGN_2,        ptr ,            ,    #T9856)

; ITemplate_ASGN1_4_R
	SECTION        	0x1
	MOV            	(_main_ptr_7+0x1) & 0X7F,	0x0		; Bank 1
	MOVA           	(_main_#T9856_8+0x1) & 0X7F		; Bank 1
	MOV            	(_main_ptr_7) & 0X7F,	0x0		; Bank 1
	MOVA           	(_main_#T9856_8) & 0X7F		; Bank 1
;   89:(    ASGN_1,    *#T9856 ,            ,      TX1B)

; ITemplate_GetRamRef
	MOV            	(_main_#T9856_8+0x1) & 0X7F,	0x0		; Bank 1
	MOVA           	IAAH
	MOV            	(_main_#T9856_8) & 0X7F,	0x0		; Bank 1
	MOVA           	IAAL
	MOV            	IAD,	0x0
	MOVAR          	?_TMP		; Bank 0
; ITemplate_ASGN1_4
	MOVRA          	?_TMP		; Bank 0
	MOVA           	_TX1B_0#sh		; ShBank 1
;   89:(     ADD_2,        ptr ,          1 ,       ptr)

; ITemplate_INC_2_TMP
	INC            	(_main_ptr_7) & 0X7F		; Bank 1
	JBS            	PSW,	0x2
	GOTO           	#L9911
	INC            	(_main_ptr_7+0x1) & 0X7F		; Bank 1
#L9911
#line 90	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;         CLRWDT();
; ITemplate_LABEL
;-----------Embedded Asm--------------
	CWDT
;-------------------------------------
#line 91	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     }
;   91:(       JMP,            ,            ,    #L9837)

; ITemplate_JMP
	GOTO           	#L9837
#line 93	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     while (1)
;   93:(     LABEL,     #L9872 ,            ,          )

; ITemplate_LABEL
#L9872
;     {
; #ifndef IT_SR           //查询方式发送接收
;         if (RX1IF == 1)
;         {
;             rxbuf = RX1B;
;             while (!TRMT1);
;             TX1B = rxbuf;
;         }
; #endif
#line 107	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;         CLRWDT();
; ITemplate_LABEL
;-----------Embedded Asm--------------
	CWDT
;-------------------------------------
#line 108	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     }
;  108:(       JMP,            ,            ,    #L9872)

; ITemplate_JMP
	GOTO           	#L9872
	_DESC          	##isr,0X0,0X0

SECTION1isr	UNINTIAL       	0		; Bank 0
	ORG            	0X93		; Bank 0
_isrDATA	RSEG           	0X1		; Bank 0
; interrupt fun entry
	PUBLIC         	SAVED_TMP
SECTION0_INT_SAVED_00	UNINTIAL       		; Bank 0
SAVED_FSR	RSEG           	0x3
SECTION0_INT_SAVED_3	UNINTIAL       		; Bank 0
SAVED_TMP	RSEG           	0x1
INT_ENTRY	CSEG           	0x04
; ITemplate_InterruptHead
_INT_ENTRY
	PUSH           	
	CLR            	PCRH
	CLR            	BKSR
	MOV            	IAAL,	0x0
	MOVA           	(SAVED_FSR) & 0X7F		; Bank 0
	MOV            	IAAH,	0x0
	MOVA           	(SAVED_FSR+0x1) & 0X7F		; Bank 0
	MOV            	(CSEG_PTR) & 0X7F,	0x0		; Bank 0
	MOVA           	(CSEG_PTR+0x2) & 0X7F		; Bank 0
	MOV            	(CSEG_PTR+0x1) & 0X7F,	0x0		; Bank 0
	MOVA           	(CSEG_PTR+0x3) & 0X7F		; Bank 0
	MOV            	(MUL_TEMP) & 0X7F,	0x0		; Bank 0
	MOVA           	(MUL_TEMP+0x2) & 0X7F		; Bank 0
	MOV            	(MUL_TEMP+0x1) & 0X7F,	0x0		; Bank 0
	MOVA           	(MUL_TEMP+0x3) & 0X7F		; Bank 0
isr#	CSEG           
_isr
; }
; /**********************************************
; 函数名：void isr(void) interrupt
; 描  述：中断服务程序
; 输入值：无
; 输出值：无
; 返回值：无
; **********************************************/
; #ifdef IT_SR
; void isr(void) interrupt
; {
#line 121	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;     if (RX1IE == 1 && RX1IF == 1)
;  121:(    CVB_SC,      RX1IE ,            ,    #T9884)

; ITemplate_CVB_UC
	MOVI           	0x0
	JBC            	(_RX1IE_0)/8,	(_RX1IE_0)%8
	MOVI           	0x1
	SECTION        	0x1
	MOVA           	(_isr_#T9884_13) & 0X7F		; Bank 1
;  121:(    JNEQ_1,          1 ,     #T9884 ,    #L9910)

; ITemplate_JNEQ1_4
	MOV            	(_isr_#T9884_13) & 0X7F,	0x0		; Bank 1
	XORI           	0x1
	JBS            	PSW,	0x2
	GOTO           	#L9910
;  121:(    CVB_SC,      RX1IF ,            ,    #T9891)

; ITemplate_CVB_UC
	MOVI           	0x0
	JBC            	(_RX1IF_0)/8,	(_RX1IF_0)%8
	MOVI           	0x1
	MOVA           	(_isr_#T9891_13) & 0X7F		; Bank 1
;  121:(    JNEQ_1,          1 ,     #T9891 ,    #L9910)

; ITemplate_JNEQ1_4
	MOV            	(_isr_#T9891_13) & 0X7F,	0x0		; Bank 1
	XORI           	0x1
	JBS            	PSW,	0x2
	GOTO           	#L9910
;     {
#line 123	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;         rxbuf = RX1B;
;  123:(    ASGN_1,       RX1B ,            ,     rxbuf)

; ITemplate_ASGN1_4_R
	BSS            	BKSR,	0x4
	MOV            	_RX1B_0#sh,	0x0		; ShBank 1
	MOVA           	(_rxbuf) & 0X7F		; Bank 1
#line 125	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;         while (!TRMT1);
;  125:(     LABEL,     #L9900 ,            ,          )

; ITemplate_LABEL
#L9900
;  125:(      JZ_0,      TRMT1 ,            ,    #L9900)

; ITemplate_JZ_0
	JBS            	(_TRMT1_0#sh)/8,	(_TRMT1_0#sh)%8		; ShBank 1
	GOTO           	#L9900
#line 127	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ;         TX1B = rxbuf;
;  127:(    ASGN_1,      rxbuf ,            ,      TX1B)

; ITemplate_ASGN1_4_R
	MOV            	(_rxbuf) & 0X7F,	0x0		; Bank 1
	MOVA           	_TX1B_0#sh		; ShBank 1
;     }
#line 129	C:\Lisq\Project\Git\AN135_Examples_ES7P169C_ES7P0693_ES7P0031\UART\uart\uart.c ; }
;  129:(     LABEL,     #L9910 ,            ,          )

; ITemplate_LABEL
#L9910
;  129:(     RET_I,            ,            ,          )

; ITemplate_RET_I
	SECTION        	0x0
	BCC            	BKSR,	0x4
	GOTO           	_INT_RESTORE		; Bank 0		; ShBank 0
; interrupt fun restore
INT_RESTORE	CSEG           
; ITemplate_InterruptTail
_INT_RESTORE
	NOP            	
	NOP            	
	MOV            	(CSEG_PTR+0x3) & 0X7F,	0x0		; Bank 0
	MOVA           	(CSEG_PTR+0x1) & 0X7F		; Bank 0
	MOV            	(CSEG_PTR+0x2) & 0X7F,	0x0		; Bank 0
	MOVA           	(CSEG_PTR) & 0X7F		; Bank 0
	MOV            	(MUL_TEMP+0x2) & 0X7F,	0x0		; Bank 0
	MOVA           	(MUL_TEMP) & 0X7F		; Bank 0
	MOVA           	MULA
	MOV            	(MUL_TEMP+0x3) & 0X7F,	0x0		; Bank 0
	MOVA           	(MUL_TEMP+0x1) & 0X7F		; Bank 0
	MOVA           	MULB
	MOV            	(SAVED_FSR+0x1) & 0X7F,	0x0		; Bank 0
	MOVA           	IAAH
	MOV            	(SAVED_FSR) & 0X7F,	0x0		; Bank 0
	MOVA           	IAAL
	POP            	
	RETIE          	

SECTION0C__Program_Files__x86__HRCC_Tools_HRCC_v1_2_0_140_tools_INCLUDE_ES7P169C_h_STATIC0	UNINTIAL       		; Bank 0
_#T0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC1	PSECT	FLAG=0X1088,ADDR=0X7FCB7
_GIE_0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC2	PSECT	FLAG=0X1088,ADDR=0X7FCF9
_RX1IE_0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC3	PSECT	FLAG=0X1088,ADDR=0X7FD01
_RX1IF_0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC4	PSECT	FLAG=0X1088,ADDR=0X7FD75
_PBT5_0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC5	PSECT	FLAG=0X1088,ADDR=0X7FD76
_PBT6_0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC6	PSECT	FLAG=0X1088,ADDR=0X306AE
_RX1LEN_0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC7	PSECT	FLAG=0X1088,ADDR=0X306AF
_RX1EN_0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC8	PSECT	FLAG=0X1088,ADDR=0X306B9
_TRMT1_0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC9	PSECT	FLAG=0X1088,ADDR=0X306BD
_BRGH1_0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC10	PSECT	FLAG=0X1088,ADDR=0X306BE
_TX1LEN_0	RSEG           	0X1		; Bank 0

SECTION8C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC11	PSECT	FLAG=0X1088,ADDR=0X306BF
_TX1EN_0	RSEG           	0X1		; Bank 0

SECTION1IC__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c13	IDATA          		0X80		; Bank 0
_str	DB             	0X77,0XE4,0X77,0XE4,0X77,0XE4,0X2E,0XE4,0X65,0XE4,0X73,0XE4,0X73,0XE4,0X65,0XE4,0X6D,0XE4,0X69,0XE4
	DB		0X2E,0XE4,0X63,0XE4,0X6F,0XE4,0X6D,0XE4,0X0,0XE4		; Bank 0

SECTION1C__Lisq_Project_Git_AN135_Examples_ES7P169C_ES7P0693_ES7P0031_UART_uart_uart_c_STATIC	UNINTIAL       	0		; Bank 0
	ORG            	0X94		; Bank 0
_rxbuf	RSEG           	0X1		; Bank 0

SECTION8C__Program_Files__x86__HRCC_Tools_HRCC_v1_2_0_140_tools_INCLUDE_ES7P169C_h_STATIC	UNINTIAL       	0		; Bank 0
	ORG            	0XFF80		; Bank 0
_IAD_0	RSEG           	0X1		; Bank 0
	ORG            	0XFF81		; Bank 0
_IAAL_0	RSEG           	0X1		; Bank 0
	ORG            	0XFF82		; Bank 0
_IAAH_0	RSEG           	0X1		; Bank 0
	ORG            	0XFF8D		; Bank 0
_ANSH_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFA8		; Bank 0
_PA_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFA9		; Bank 0
_PB_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFAA		; Bank 0
_PC_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFAD		; Bank 0
_PAT_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFAE		; Bank 0
_PBT_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFAF		; Bank 0
_PCT_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFBC		; Bank 0
_ANSL_0	RSEG           	0X1		; Bank 0
	ORG            	0X60D4		; Bank 0
_RX1B_0	RSEG           	0X1		; Bank 0
	ORG            	0X60D6		; Bank 0
_TX1B_0	RSEG           	0X1		; Bank 0
	ORG            	0X60D8		; Bank 0
_BR1R_0	RSEG           	0X1		; Bank 0
	END
