; Asm codes generated by Shanghai Haier C Compiler
; HRCO, Ver: 1.0,0117

#INCLUDE       	<ES7P0693.INC>
#INCLUDE       	<OPERATION.INC>
	PUBLIC         	_RAMclear
	PUBLIC         	_GPIOInit
	PUBLIC         	_main
#TMP	EQU            	?_TMP+ 0X0		; Bank 0
?_TMP_RET	EQU            	?_TMP		; Bank 0
_T31EN_0#sh	EQU            	0X608		; Bank 0
_BKIC_0#sh	EQU            	0X68F		; Bank 0
_UPT_0#sh	EQU            	0X698		; Bank 0
_T31DLYT_0#sh	EQU            	0XC0		; Bank 0
_T31C0L_0#sh	EQU            	0XC1		; Bank 0
_T31C0H_0#sh	EQU            	0XC2		; Bank 0
_T31C2L_0#sh	EQU            	0XC5		; Bank 0
_T31CH1C_0#sh	EQU            	0XD4		; Bank 0
_T31PINCL_0#sh	EQU            	0XD8		; Bank 0
_T31PRSL_0#sh	EQU            	0XDC		; Bank 0
_T31PRSH_0#sh	EQU            	0XDD		; Bank 0
_T31CNTLDL_0#sh	EQU            	0XDE		; Bank 0
_T31CNTLDH_0#sh	EQU            	0XDF		; Bank 0
_T31CH1RL_0#sh	EQU            	0XE1		; Bank 0
_T31CH1RH_0#sh	EQU            	0XE2		; Bank 0
_MULA_0#sh	EQU            	(MULA - 0X6080) % 0X40 + 0xC0		; Bank 0
_MULB_0#sh	EQU            	(MULB - 0X6080) % 0X40 + 0xC0		; Bank 0
_MULL_0#sh	EQU            	(MULL - 0X6080) % 0X40 + 0xC0		; Bank 0
_MULH_0#sh	EQU            	(MULH - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVEL_0#sh	EQU            	(DIVEL - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVEM_0#sh	EQU            	(DIVEM - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVSL_0#sh	EQU            	(DIVSL - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVSH_0#sh	EQU            	(DIVSH - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVQL_0#sh	EQU            	(DIVQL - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVQM_0#sh	EQU            	(DIVQM - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVRL_0#sh	EQU            	(DIVRL - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVRH_0#sh	EQU            	(DIVRH - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVC_0#sh	EQU            	(DIVC - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVEU_0#sh	EQU            	(DIVEU - 0X6080) % 0X40 + 0xC0		; Bank 0
_DIVEH_0#sh	EQU            	(DIVEH - 0X6080) % 0X40 + 0xC0		; Bank 0
	_DESC          	RAMclear,0X0,0X0
RAMclear#	CSEG           
_RAMclear
; /*******************************************************
; *Copytight(C),2017,Shanghai Eastsoft Microelectronics Co.,Ltd.
; *文件名：pwm_complementary_deadtime.c
; *作  者：AE Team
; *版  本：v1.0，编译于iDesigner(v4.2.3.166) + 工具链HRCC(v1.2.0.106)
; *日  期：2020/12/17
; *描  述：多功能定时器，T31_CH1(PB5)/T31_CH1N(PB2)输出死区互补pwm，T31_ETR(PB0)高电平时T31_CH1输出低，
;         T31_CH1N输出高(与CH1P/CH1NP有关)，PB1高电平刹车。
;         注意：PWM模式调试状态下，须软件固定设置T31C0H<6>=1，否则PWM输出可能会异常。
; *备  注：适用于ES7P0693使用，对用户直接引用代码所带来的风险或后果不承担任何法律责任。
; *******************************************************/
; #include <hic.h>
; #define CLRWDT()   {__Asm CWDT;}        //宏定义清狗指令
; /******************************************************
; 函数名：void RAMclear(void)
; 描  述：RAM区数据清零，RAM区地址0x0000~0x03FF
; 输入值：无
; 输出值：无
; 返回值：无
; *******************************************************/
; void RAMclear(void)
; {
#line 25	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     for (IAAH=0; IAAH<=0x03; IAAH++)
	CLR            	BKSR
;   25:(    ASGN_1,          0 ,            ,      IAAH)

; ITemplate_CLR1_4_TMP
	CLR            	_IAAH_0
;   25:(     LABEL,    #L20268 ,            ,          )

; ITemplate_LABEL
#L20268
;   25:(    JGT_1U,       IAAH ,          3 ,   #L20345)

; ITemplate_JGT1_4U
	MOV            	_IAAH_0,	0x0
	SUBI           	0x3
	JBS            	PSW,	0x0
	GOTO           	#L20345
;     {
#line 27	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;         for (IAAL=0; IAAL<0xFF; IAAL++)
;   27:(    ASGN_1,          0 ,            ,      IAAL)

; ITemplate_CLR1_4_TMP
	CLR            	_IAAL_0
;   27:(     LABEL,    #L20285 ,            ,          )

; ITemplate_LABEL
#L20285
;   27:(    JGE_1U,       IAAL ,        255 ,   #L20286)

; ITemplate_JGE1_4U
	MOVI           	0xff
	SUB            	_IAAL_0,	0x0
	JBC            	PSW,	0x0
	GOTO           	#L20286
#line 28	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;             IAD = 0x00;
;   28:(    ASGN_1,          0 ,            ,       IAD)

; ITemplate_CLR1_4_TMP
	CLR            	_IAD_0
;   27:(     ADD_1,       IAAL ,          1 ,      IAAL)

; ITemplate_INC_1_TMP
	INC            	_IAAL_0
;   28:(       JMP,            ,            ,   #L20285)

; ITemplate_JMP
	GOTO           	#L20285
;   28:(     LABEL,    #L20286 ,            ,          )

; ITemplate_LABEL
#L20286
#line 29	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;         IAD = 0x00;
;   29:(    ASGN_1,          0 ,            ,       IAD)

; ITemplate_CLR1_4_TMP
	CLR            	_IAD_0
;   25:(     ADD_1,       IAAH ,          1 ,      IAAH)

; ITemplate_INC_1_TMP
	INC            	_IAAH_0
#line 30	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     }
;   30:(       JMP,            ,            ,   #L20268)

; ITemplate_JMP
	GOTO           	#L20268
#line 31	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ; }
;   31:(     LABEL,    #L20345 ,            ,          )

; ITemplate_LABEL
#L20345
;   31:(       RET,            ,            ,          )

; ITemplate_RET
	RET            			; Bank 0		; ShBank 0
	_DESC          	GPIOInit,0X0,0X0
GPIOInit#	CSEG           
_GPIOInit
; /******************************************************
; 函数名：void GPIOInit(void)
; 描  述：首先初始化所有未用到的IO口为输出低电平
; 输入值：无
; 输出值：无
; 返回值：无
; *******************************************************/
; void GPIOInit(void)
; {
#line 42	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     ANSL = 0xFF;        //选择对应端口为数字IO功能
	CLR            	BKSR
;   42:(    ASGN_1,        255 ,            ,      ANSL)

; ITemplate_ASGN1_4_R
	MOVI           	0xff
	MOVA           	_ANSL_0
#line 43	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ; 	ANSH = 0xFF;        //选择对应端口为数字IO功能
;   43:(    ASGN_1,        255 ,            ,      ANSH)

; ITemplate_ASGN1_4_R
	MOVI           	0xff
	MOVA           	_ANSH_0
#line 44	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PAT = 0x00;         //所有IO设为输出低电平
;   44:(    ASGN_1,          0 ,            ,       PAT)

; ITemplate_CLR1_4_TMP
	CLR            	_PAT_0
#line 45	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PBT = 0x00;
;   45:(    ASGN_1,          0 ,            ,       PBT)

; ITemplate_CLR1_4_TMP
	CLR            	_PBT_0
#line 46	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PCT = 0x00;
;   46:(    ASGN_1,          0 ,            ,       PCT)

; ITemplate_CLR1_4_TMP
	CLR            	_PCT_0
#line 47	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PA = 0x00;
;   47:(    ASGN_1,          0 ,            ,        PA)

; ITemplate_CLR1_4_TMP
	CLR            	_PA_0
#line 48	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PB = 0x00;
;   48:(    ASGN_1,          0 ,            ,        PB)

; ITemplate_CLR1_4_TMP
	CLR            	_PB_0
#line 49	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PC = 0x00;
;   49:(    ASGN_1,          0 ,            ,        PC)

; ITemplate_CLR1_4_TMP
	CLR            	_PC_0
#line 51	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PBT0 = 1;           //T31_ETR设为输入
;   51:(    ASGN_0,          1 ,            ,      PBT0)

; ITemplate_SET_0_TMP
	BSS            	(_PBT0_0)/8,	(_PBT0_0)%8
#line 52	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PBPD0 = 1;          //使能下拉
;   52:(    ASGN_0,          1 ,            ,     PBPD0)

; ITemplate_SET_0_TMP
	BSS            	(_PBPD0_0)/8,	(_PBPD0_0)%8
#line 53	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PBT1 = 1;           //TIM1_BRK设为输入
;   53:(    ASGN_0,          1 ,            ,      PBT1)

; ITemplate_SET_0_TMP
	BSS            	(_PBT1_0)/8,	(_PBT1_0)%8
#line 54	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PBPD1 = 1;
;   54:(    ASGN_0,          1 ,            ,     PBPD1)

; ITemplate_SET_0_TMP
	BSS            	(_PBPD1_0)/8,	(_PBPD1_0)%8
#line 55	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     PB7 = 1;            //打开学习板蜂鸣器
;   55:(    ASGN_0,          1 ,            ,       PB7)

; ITemplate_SET_0_TMP
	BSS            	(_PB7_0)/8,	(_PB7_0)%8
#line 56	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ; }
;   56:(       RET,            ,            ,          )

; ITemplate_RET
	RET            			; Bank 0		; ShBank 0
	_DESC          	main,0X0,0X0,RAMclear,GPIOInit
main#	CSEG           
_main
; /*******************************************************
; 函数名：void main(void)
; 描  述：主函数，T31_CH1(PB5)/T31_CH1N(PB2)输出死区互补pwm，PB0高电平时T31_CH1输出低，T31_CH1N输出高，
;         PB1高电平刹车刹车自动关闭管脚输出功能，即刹车CHOE自动清0，重启需手动置CHOE为1
; 输入值：无
; 输出值：无
; 返回值：无
; *******************************************************/
; void main(void) 
; {
#line 68	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     RAMclear();
	CLR            	BKSR
;   68:(      CALL, (RAMclear.0) ,            ,          )

; ITemplate_CALL
	SEGMENTSEL     	_RAMclear
	CALL           	_RAMclear		; Bank 0		; ShBank 0
	SEGMENTSEL     	$
#line 69	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     GPIOInit();
;   69:(      CALL, (GPIOInit.0) ,            ,          )

; ITemplate_CALL
	SEGMENTSEL     	_GPIOInit
	CALL           	_GPIOInit		; Bank 0		; ShBank 0
	SEGMENTSEL     	$
#line 70	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31C0H = 0x42;          //T31C0H<6>(HTOEOFF)调试模式下需软件固定为1，死区发生器时钟频率tDTS=2*tCK_INT
;   70:(    ASGN_1,         66 ,            ,    T31C0H)

; ITemplate_ASGN1_4_R
	MOVI           	0x42
	MOVA           	_T31C0H_0#sh		; ShBank 0
#line 71	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31C0L = 0x80;          //边沿计数模式，向上计数，使能T31CNTLD缓冲功能(即写入值在下一次更新事件时生效)
;   71:(    ASGN_1,        128 ,            ,    T31C0L)

; ITemplate_ASGN1_4_R
	MOVI           	0x80
	MOVA           	_T31C0L_0#sh		; ShBank 0
#line 72	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31CH1C = 0xE8;         //通道1配置为输出，使能输出比较1清零，pwm1模式,使能TIM_CCR1缓冲功能 
;   72:(    ASGN_1,        232 ,            ,   T31CH1C)

; ITemplate_ASGN1_4_R
	MOVI           	0xe8
	MOVA           	_T31CH1C_0#sh		; ShBank 0
#line 73	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31PINCL = 0x05;        //T31_CH1高电平有效，使能输出。T31_CH1N通道高电平有效，使能输出。
;   73:(    ASGN_1,          5 ,            ,  T31PINCL)

; ITemplate_ASGN1_4_R
	MOVI           	0x5
	MOVA           	_T31PINCL_0#sh		; ShBank 0
#line 74	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31C2L = 0x08;          //禁止从模式,使能外部事件清除OCnREF
;   74:(    ASGN_1,          8 ,            ,    T31C2L)

; ITemplate_ASGN1_4_R
	MOVI           	0x8
	MOVA           	_T31C2L_0#sh		; ShBank 0
#line 75	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31PRSH = 0x00;         //预分频系数1:16
;   75:(    ASGN_1,          0 ,            ,   T31PRSH)

; ITemplate_CLR1_4_TMP
	CLR            	_T31PRSH_0#sh		; ShBank 0
#line 76	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31PRSL = 0x0F;
;   76:(    ASGN_1,         15 ,            ,   T31PRSL)

; ITemplate_ASGN1_4_R
	MOVI           	0xf
	MOVA           	_T31PRSL_0#sh		; ShBank 0
#line 77	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31CNTLDH = 0x03;       //重装载值，代表pwm周期长度
;   77:(    ASGN_1,          3 ,            , T31CNTLDH)

; ITemplate_ASGN1_4_R
	MOVI           	0x3
	MOVA           	_T31CNTLDH_0#sh		; ShBank 0
#line 78	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31CNTLDL = 0xE8;
;   78:(    ASGN_1,        232 ,            , T31CNTLDL)

; ITemplate_ASGN1_4_R
	MOVI           	0xe8
	MOVA           	_T31CNTLDL_0#sh		; ShBank 0
#line 79	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31CH1RH = 0x01;        //比较寄存器1值，代表pwm占空比长度
;   79:(    ASGN_1,          1 ,            ,  T31CH1RH)

; ITemplate_ASGN1_4_R
	MOVI           	0x1
	MOVA           	_T31CH1RH_0#sh		; ShBank 0
#line 80	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31CH1RL = 0x4D;
;   80:(    ASGN_1,         77 ,            ,  T31CH1RL)

; ITemplate_ASGN1_4_R
	MOVI           	0x4d
	MOVA           	_T31CH1RL_0#sh		; ShBank 0
#line 81	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31CHBK |= 0x30;        //使能高电平刹车
;   81:(     BOR_1,         48 ,    T31CHBK ,   T31CHBK)

; ITemplate_BOR1_4
	MOV            	_T31CHBK_0,	0x0
	IORI           	0x30
	MOVA           	_T31CHBK_0
#line 82	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31DLYT = 0x7F;         //Tdtg=tDTS=2*tCK_INT,死区时间31.75us
;   82:(    ASGN_1,        127 ,            ,   T31DLYT)

; ITemplate_ASGN1_4_R
	MOVI           	0x7f
	MOVA           	_T31DLYT_0#sh		; ShBank 0
#line 83	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     HALT_PWM = 0;           //在线调试暂停状态下，PWM仍输出
;   83:(    ASGN_0,          0 ,            ,  HALT_PWM)

; ITemplate_CLR_0_TMP
	BCC            	(_HALT_PWM_0)/8,	(_HALT_PWM_0)%8
#line 84	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     UPT = 1;        //更新所有寄存器的缓冲器，使写入值立即生效
;   84:(    ASGN_0,          1 ,            ,       UPT)

; ITemplate_SET_0_TMP
	BSS            	(_UPT_0#sh)/8,	(_UPT_0#sh)%8		; ShBank 0
#line 85	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     BKIC = 1;       //清刹车标志位
;   85:(    ASGN_0,          1 ,            ,      BKIC)

; ITemplate_SET_0_TMP
	BSS            	(_BKIC_0#sh)/8,	(_BKIC_0#sh)%8		; ShBank 0
#line 86	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     CHOE = 1;       //使能输出
;   86:(    ASGN_0,          1 ,            ,      CHOE)

; ITemplate_SET_0_TMP
	BSS            	(_CHOE_0)/8,	(_CHOE_0)%8
#line 87	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     T31EN = 1;      //使能计数器
;   87:(    ASGN_0,          1 ,            ,     T31EN)

; ITemplate_SET_0_TMP
	BSS            	(_T31EN_0#sh)/8,	(_T31EN_0#sh)%8		; ShBank 0
#line 88	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     while (1)
;   88:(     LABEL,    #L20542 ,            ,          )

; ITemplate_LABEL
#L20542
;     {
#line 90	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;         CLRWDT();
; ITemplate_LABEL
;-----------Embedded Asm--------------
	CWDT
;-------------------------------------
#line 91	E:\lisq\public_lisq\ES7P\Examples_ES7P0693\T31\pwm_complementary_deadtime\pwm_complementary_deadtime.c ;     }
;   91:(       JMP,            ,            ,   #L20542)

; ITemplate_JMP
	GOTO           	#L20542

SECTION8E__lisq_public_lisq_ES7P_Examples_ES7P0693_T31_pwm_complementary_deadtime_pwm_complementary_deadtime_c_STATIC0	PSECT	FLAG=0X1088,ADDR=0X7FD38
_HALT_PWM_0	RSEG           	0X1		; Bank 0

SECTION8E__lisq_public_lisq_ES7P_Examples_ES7P0693_T31_pwm_complementary_deadtime_pwm_complementary_deadtime_c_STATIC1	PSECT	FLAG=0X1088,ADDR=0X7FD4F
_PB7_0	RSEG           	0X1		; Bank 0

SECTION8E__lisq_public_lisq_ES7P_Examples_ES7P0693_T31_pwm_complementary_deadtime_pwm_complementary_deadtime_c_STATIC2	PSECT	FLAG=0X1088,ADDR=0X7FD70
_PBT0_0	RSEG           	0X1		; Bank 0

SECTION8E__lisq_public_lisq_ES7P_Examples_ES7P0693_T31_pwm_complementary_deadtime_pwm_complementary_deadtime_c_STATIC3	PSECT	FLAG=0X1088,ADDR=0X7FD71
_PBT1_0	RSEG           	0X1		; Bank 0

SECTION8E__lisq_public_lisq_ES7P_Examples_ES7P0693_T31_pwm_complementary_deadtime_pwm_complementary_deadtime_c_STATIC4	PSECT	FLAG=0X1088,ADDR=0X7FD88
_PBPD0_0	RSEG           	0X1		; Bank 0

SECTION8E__lisq_public_lisq_ES7P_Examples_ES7P0693_T31_pwm_complementary_deadtime_pwm_complementary_deadtime_c_STATIC5	PSECT	FLAG=0X1088,ADDR=0X7FD89
_PBPD1_0	RSEG           	0X1		; Bank 0

SECTION8E__lisq_public_lisq_ES7P_Examples_ES7P0693_T31_pwm_complementary_deadtime_pwm_complementary_deadtime_c_STATIC6	PSECT	FLAG=0X1088,ADDR=0X7FDFF
_CHOE_0	RSEG           	0X1		; Bank 0

SECTION8E__lisq_public_lisq_ES7P_Examples_ES7P0693_T31_pwm_complementary_deadtime_pwm_complementary_deadtime_c_STATIC7	PSECT	FLAG=0X1088,ADDR=0X30408
_T31EN_0	RSEG           	0X1		; Bank 0

SECTION8E__lisq_public_lisq_ES7P_Examples_ES7P0693_T31_pwm_complementary_deadtime_pwm_complementary_deadtime_c_STATIC8	PSECT	FLAG=0X1088,ADDR=0X3048F
_BKIC_0	RSEG           	0X1		; Bank 0

SECTION8E__lisq_public_lisq_ES7P_Examples_ES7P0693_T31_pwm_complementary_deadtime_pwm_complementary_deadtime_c_STATIC9	PSECT	FLAG=0X1088,ADDR=0X30498
_UPT_0	RSEG           	0X1		; Bank 0

SECTION8D__Program_Files__x86__iDesigner4_1_tools_INCLUDE_ES7P0693_h_STATIC	UNINTIAL       	0		; Bank 0
	ORG            	0XFF80		; Bank 0
_IAD_0	RSEG           	0X1		; Bank 0
	ORG            	0XFF81		; Bank 0
_IAAL_0	RSEG           	0X1		; Bank 0
	ORG            	0XFF82		; Bank 0
_IAAH_0	RSEG           	0X1		; Bank 0
	ORG            	0XFF8D		; Bank 0
_ANSH_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFA8		; Bank 0
_PA_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFA9		; Bank 0
_PB_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFAA		; Bank 0
_PC_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFAD		; Bank 0
_PAT_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFAE		; Bank 0
_PBT_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFAF		; Bank 0
_PCT_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFBC		; Bank 0
_ANSL_0	RSEG           	0X1		; Bank 0
	ORG            	0XFFBF		; Bank 0
_T31CHBK_0	RSEG           	0X1		; Bank 0
	ORG            	0X6080		; Bank 0
_T31DLYT_0	RSEG           	0X1		; Bank 0
	ORG            	0X6081		; Bank 0
_T31C0L_0	RSEG           	0X1		; Bank 0
	ORG            	0X6082		; Bank 0
_T31C0H_0	RSEG           	0X1		; Bank 0
	ORG            	0X6085		; Bank 0
_T31C2L_0	RSEG           	0X1		; Bank 0
	ORG            	0X6094		; Bank 0
_T31CH1C_0	RSEG           	0X1		; Bank 0
	ORG            	0X6098		; Bank 0
_T31PINCL_0	RSEG           	0X1		; Bank 0
	ORG            	0X609C		; Bank 0
_T31PRSL_0	RSEG           	0X1		; Bank 0
	ORG            	0X609D		; Bank 0
_T31PRSH_0	RSEG           	0X1		; Bank 0
	ORG            	0X609E		; Bank 0
_T31CNTLDL_0	RSEG           	0X1		; Bank 0
	ORG            	0X609F		; Bank 0
_T31CNTLDH_0	RSEG           	0X1		; Bank 0
	ORG            	0X60A1		; Bank 0
_T31CH1RL_0	RSEG           	0X1		; Bank 0
	ORG            	0X60A2		; Bank 0
_T31CH1RH_0	RSEG           	0X1		; Bank 0
	END
